Addressing the Challenges in Multicore Programming
A workshop to investigate the issues involved in programming multicore devices
Date: 29 April 2009
Venue: Le Meridien Hotel, Piccadilly (View Directions)
21 PICCADILLY, LONDON, W1J 0BH, UNITED KINGDOM
This workshop will be conducted as a series of facilitator-led discussions on related subjects. Its clear objective is to find out what is needed to raise awareness by UK industry at large of the important business issues around multicore programming and what steps are needed to ensure that appropriate training and tools are available to UK industry to take advantage of the multicore revolution. This pilot workshop will involve stakeholders from the KTNs and TSB and selected representatives of the IT community. The outcomes of this workshop will be captured and then incorporated into a report, which will be distributed to the participants for further comment and review. It will then be used to inform a further “awareness” seminar and call to action.
Workshop Mission
Read the full mission statement for this workshop here
Draft Agenda View the proposed agenda for the day here
NEW Position Papers
In order to help stimulate discussion at this workshop, participants in this workshop are invited to submit a short "position paper" in advance of the workshop. Any papers submitted will be uploaded to this website and made available to other participants. The subject of the paper may relate to existing projects, technologies, companies or individuals who are conducting work in the field of multicore programming. Informal notes are just as welcome as more formal papers as long as they relate to the theme of multicore programming.
| Contributor |
Title and Description |
Download Link |
David Stewart, CEO
Critical Blue
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Listening to Sequential Programmers Going Parallel
This presentation was delivered by David as a keynote at Multicore Expo in the US a few weeks ago – it explains clearly what they see as the key items which are holding back adoption of multicore architectures…. and they are all in the software domain.
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| Andrew Brown/Steve Furber (Manchester University) |
Computing beyond a Million Processors
bio-inspired massively-parallel architectures
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Multicore: the challenges ahead
The performance gains suggested by Moore's Law are no longer delivered through increased clock speed, but by multicore processors running at the same – or often slower – clock speed. AMD offers four cores, IBM's Power 6 has two, Intel's x86 family supports six and SPARC64 VII from Fujitsu has four. But in a few years time, we will appreciate that this only scratches the surface of multicore's possibilities.....
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Ian Watson
School of Computer Science
University of Manchester
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Issues in Multi-Core Programming
In the short term it may be possible to adopt an evolutionary approach to multi-core
programming. In the longer term more radical solutions are needed
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Draft Notes from Workshop
This set of notes represents the RAW output of the workshop. Please download, read and add comments as you wish. If you wish to add comments to this document it would be helpful if you could switch on the "Track Changes" option in Microsoft word and then return the editted document back to me (
daniel.dearing@electronics-ktn.com). Alternatively you can just send me comments in a separate document and we will do our best to incorporate them in the report.
We will try to produce a more detailed report from these notes over the coming weeks and let you know as soon as we post it here.
Invitee/Delegate List
| Name |
Job Title |
Company |
Status |
| Daniel Dearing |
Technology Business Manager |
Electronics KTN |
Confirmed |
| Peter Dzwig |
Partner |
Concertant LLP |
Confirmed |
| Francis Wray |
Partner |
Concertant LLP |
Unavailable |
| Nick Appleyard |
Lead Technologist, Electronics/Photonics/Electrical Systems |
Technology Strategy Board |
Confirmed |
| Zoe Lock |
Lead Technologist - ICT |
Technology Strategy Board |
Confirmed |
| Maurizio Pilu |
Lead Technologist - Information and Communication Technology |
Technology Strategy Board |
Confirmed |
| Ian Osborne |
Project Director, Intellect |
Grid Computing Now! Knowledge Transfer Network |
Unavailable |
| John Barr |
Research Director, Financial Markets & Head of EU Research |
The 451 Group |
Confirmed |
| Lorcan Mac Manus |
Technical Staff |
Industrial maths KTN |
Confirmed |
| Paul Graham |
Software Architect |
EPCC, University of Edinburgh |
Confirmed |
| Mike Rudgyard |
CEO and Founder |
Allinea |
Confirmed |
| David Stewart |
CEO |
Critical Blue |
Unavailable |
| Richard Taylor |
CTO and Co-Founder |
Critical Blue |
Confirmed |
| Andrew Richards |
CEO |
Codeplay Software |
|
| Prof. Ian Watson |
Professor of Computer Science in the School of Computer Science |
University of Manchester |
Confirmed |
| Prof. Andrew Brown |
Professor |
University of Southampton |
Confirmed |
| Ray McConnell |
CTO |
ClearSpeed Technology |
Confirmed |
| Jamil Appa |
Group Leader/Senior Principal Engineer - Integration Technologies |
BAE Systems |
Confirmed |
| Mark Knox |
Baseband Systems Manager |
Freescale Semiconductors |
Confirmed |
| David Turland |
Team Lead Advanced Technologies |
AWE Supercomputer Solutions |
Confirmed |
| Ben Ralston |
External Interactions |
AWE Supercomputer Solutions |
Confirmed |
| Haralambos Hatzakis |
Director |
Biotronics3D |
Confirmed |
| Tony Stansfield |
|
Panasonic/PSDCE |
Confirmed |
| Paul Kelly |
|
Imperial College |
Confirmed |
| Stephen Hill |
|
ARM |
Confirmed |
| Steve Neill |
Managing Director |
Infineon UK |
Confirmed |
| Glenn Farrall |
Senior Principal Microprocessor Systems Architect |
Infineon UK |
Confirmed |